I. Field
The present disclosure relates generally to electronics, and more specifically to a frequency divider.
II. Background
A frequency divider is a circuit that receives a clock signal at a first frequency and provides a divided signal at a second frequency, which is lower than the first frequency. For example, a frequency divider may divide a clock signal by a factor of two in frequency and provide a divided signal at half the frequency of the clock signal.
Frequency dividers are commonly used in various circuits such as local oscillator (LO) generators. For example, an LO generator may include (i) an oscillator to generate an oscillator/clock signal at a first frequency and (ii) a frequency divider to divide the oscillator/clock signal and provide divided signals at a second frequency. The divided signals may be used to generate inphase (I) and quadrature (Q) LO signals, which may be used by a receiver for frequency downconversion and/or by a transmitter for frequency upconversion.
It may be desirable to generate LO signals having an adjustable duty cycle. The duty cycle of LO signals for a receiver may determine when mixers in the receiver are turned on. The duty cycle of the LO signals may thus have a large impact on linearity of the receiver and may affect various performance metrics such as second-order input intercept point (IIP2). It may be desirable to adjust the duty cycle of the LO signals in order to obtain good linearity.